The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 27, 2026

Filed:

Nov. 19, 2021
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Richard Geiger, Munich, DE;

Georgios Panagopoulos, Munich, DE;

Johannes Xaver Rauh, Kirchseeon, DE;

Harald Gossner, Riemerling, DE;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 89/60 (2025.01); H10D 8/01 (2025.01); H10D 8/50 (2025.01); H10D 8/60 (2025.01);
U.S. Cl.
CPC ...
H10D 89/931 (2025.01); H10D 8/045 (2025.01); H10D 8/051 (2025.01); H10D 8/50 (2025.01); H10D 8/60 (2025.01); H10D 89/611 (2025.01);
Abstract

Disclosed herein are IC devices, packages, and device assemblies that include diodes arranged so that their first and second terminals may be contacted from the opposite faces of a support structure. Such diodes are referred to herein as 'vertical diodes' to reflect the fact that the diode extends, in a vertical direction (i.e., in a direction perpendicular to the support structure), between the bottom and the top of support structures. Vertical diodes as described herein may introduce additional degrees of freedom in diode choices in terms of, e.g., high-voltage handling, capacitance modulation, and speed.


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