The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 27, 2026

Filed:

Feb. 03, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Ming-Heng Tsai, Taipei, TW;

Chun-Sheng Liang, Changhua County, TW;

Ta-Chun Lin, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 21/8234 (2006.01); H01L 29/423 (2006.01); H01L 29/786 (2006.01); H01L 29/788 (2006.01); H10D 30/67 (2025.01); H10D 30/68 (2025.01); H10D 62/10 (2025.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01);
U.S. Cl.
CPC ...
H10D 62/121 (2025.01); H10D 30/6735 (2025.01); H10D 30/6757 (2025.01); H10D 30/689 (2025.01); H10D 30/6891 (2025.01); H10D 84/0128 (2025.01); H10D 84/038 (2025.01);
Abstract

A semiconductor device structure includes first nanostructures formed over a substrate. The structure also includes second nanostructures formed over the substrate. The structure also includes a wall structure formed between the first nanostructures and the second nanostructures. The structure also includes a gate structure formed across the first nanostructures, the second nanostructures, and the wall structure. The wall structure includes a main portion and an extending portion, and the main portion is in direct contact with the first nanostructures and the second nanostructures. The extending portion protrudes from the sidewalls of the second nanostructures.


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