The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 20, 2026

Filed:

Jan. 27, 2023
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Makoto Shibuya, Tokyo, JP;

Kwang-Soo Kim, Sunnyvale, CA (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/16 (2023.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 23/495 (2006.01);
U.S. Cl.
CPC ...
H01L 25/165 (2013.01); H01L 21/4825 (2013.01); H01L 21/565 (2013.01); H01L 23/3107 (2013.01); H01L 23/4952 (2013.01); H01L 23/49555 (2013.01); H01L 23/49575 (2013.01); H01L 23/49582 (2013.01); H01L 24/45 (2013.01); H01L 24/48 (2013.01); H01L 24/16 (2013.01); H01L 24/32 (2013.01); H01L 24/73 (2013.01); H01L 2224/16245 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/45541 (2013.01); H01L 2224/45624 (2013.01); H01L 2224/45647 (2013.01); H01L 2224/48245 (2013.01); H01L 2224/48465 (2013.01); H01L 2224/73265 (2013.01); H01L 2924/19041 (2013.01); H01L 2924/19042 (2013.01); H01L 2924/19043 (2013.01); H01L 2924/19104 (2013.01);
Abstract

In a described example, an apparatus includes: a package substrate with conductive leads; a semiconductor die mounted to the package substrate, the semiconductor die having a first thickness; electrical connections coupling bond pads on the semiconductor die to conductive leads on the package substrate; brackets attached to the package substrate spaced from the semiconductor die and extending away from the package substrate to a distance from the package substrate that is greater than the first thickness of the semiconductor die; and mold compound covering the package substrate, the semiconductor die, the brackets, and the semiconductor die to form a semiconductor device package having a board side surface and a top surface opposite the board side surface, and having portions of the brackets exposed from the mold compound on the top surface of the semiconductor device package to form mounts for a passive component.


Find Patent Forward Citations

Shibuya, Makoto. (2026). Semiconductor device package with vertically stacked passive component (U.S. Patent No. 12532786). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12532786

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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