The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 20, 2026

Filed:

Aug. 26, 2022
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Chi-Wei Wu, Hsinchu, TW;

Hsin-Che Chiang, Taipei, TW;

Jeng-Ya Yeh, New Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 84/03 (2025.01); H01L 21/762 (2006.01); H10B 10/00 (2023.01); H10D 84/01 (2025.01); H10D 84/83 (2025.01);
U.S. Cl.
CPC ...
H10D 84/038 (2025.01); H01L 21/76232 (2013.01); H10B 10/12 (2023.02); H10B 10/18 (2023.02); H10D 84/0142 (2025.01); H10D 84/0151 (2025.01); H10D 84/0158 (2025.01); H10D 84/013 (2025.01);
Abstract

A method for forming a semiconductor structure is provided. The method for forming the semiconductor structure includes forming first fin structures and a second fin structures over a substrate, forming a first gate stack and a second gate stack that extend in a first direction across the first fin structures and the second fin structures, respectively, and etching the first gate stack and the second gate stack to form a first trench through the first gate stack and a second trench through the second gate stack. A first dimension of the first trench in the first direction is greater than a second dimension of the second trench in the first direction. The method further includes forming a first gate cutting structure and a second gate cutting structure in the first trench and the second trench, respectively.


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