The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 20, 2026

Filed:

Aug. 05, 2022
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Hong-Shyang Wu, Taipei, TW;

Kuo-Ming Wu, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 30/65 (2025.01); H10D 30/01 (2025.01); H10D 62/10 (2025.01); H10D 62/17 (2025.01); H10D 64/00 (2025.01);
U.S. Cl.
CPC ...
H10D 30/65 (2025.01); H10D 30/0281 (2025.01); H10D 62/116 (2025.01); H10D 62/393 (2025.01); H10D 64/112 (2025.01);
Abstract

A semiconductor device includes a first well of a first conductivity type near a surface of a semiconductor substrate, and a second well of a second conductivity type near the surface of the semiconductor substrate. The semiconductor device includes a transistor comprising: (i) a first source/drain region formed in the first well; (ii) a second source/drain region formed in the second well; and (iii) a gate structure formed near the surface of the semiconductor substrate and separated from the second source/drain region at least with a portion of a third well of the second conductive type. The semiconductor device includes an isolation structure formed near the surface of the semiconductor substrate and further separating the second source/drain region from the gate structure. The semiconductor device includes a plurality of field plates formed above at least one of the portion of the third well or the isolation structure.


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