The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 20, 2026
Filed:
Mar. 29, 2023
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Shih-Chieh Chao, Taichung, TW;
Ryan Chia-Jen Chen, Hsinchu, TW;
Yih-Ann Lin, Hsinchu, TW;
Yu-Hsien Lin, Kaohsiung, TW;
Li-Wei Yin, Hsinchu, TW;
Tzu-Wen Pan, Hsinchu, TW;
Jih-Sheng Yang, Hsinchu, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu, TW;
Abstract
A method includes forming a gate stack for a short-channel device and a longer-channel device; forming a first metal cap layer over the gate stacks for the short-channel device and the longer-channel device, wherein the first metal cap layer of the longer-channel device has a metal-cap recess; forming a first dielectric cap layer in the metal-cap recess; selectively removing in parallel, a portion of the gate stacks and first metal cap layer for the short-channel device and the longer-channel device; forming a first channel recess between spacers in the short-channel device and a second channel recess between a spacer and the first dielectric cap layer in the longer-channel device by the selectively removing; wherein each of the first channel recess and the second channel recess has a width dimension and a difference between the width dimensions of the first channel recess and second channel recess is less than 3 nm.