The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 20, 2026

Filed:

Apr. 29, 2024
Applicant:

Nxp Usa, Inc., Austin, TX (US);

Inventors:

Nihaar N. Mahatme, Austin, TX (US);

Anirban Roy, Austin, TX (US);

Assignee:

NXP USA, Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/406 (2006.01); G11C 11/4096 (2006.01);
U.S. Cl.
CPC ...
G11C 11/40615 (2013.01); G11C 11/40622 (2013.01); G11C 11/4096 (2013.01);
Abstract

A dynamic random access memory (DRAM) includes a plurality of main bit cells, a first set of write bit lines, a first set of write word lines, a plurality of canary cells, a second set of write bit lines, and a second set of write word lines. Each main bit cell has a capacitive storage element and is coupled to a corresponding write bit line of the first set of bit lines and a corresponding write word line of the first set of write word lines. The plurality of canary cells are configured to be more susceptible to leakage currents as compared the plurality of main bit cells. Each canary cell has a capacitive storage element and is coupled to a corresponding write bit line of the second set of bit lines and a corresponding write word line of the second set of write word lines.


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