The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 20, 2026

Filed:

Oct. 28, 2022
Applicant:

Synopsys, Inc., Mountain View, CA (US);

Inventors:

Mayukh Bhattacharya, Palo Alto, CA (US);

Huiping Huang, San Jose, CA (US);

Mihir Sherlekar, Mountain View, CA (US);

Michael Durr, Mountain View, CA (US);

Assignee:

Synopsys, Inc., Sunnyvale, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/367 (2020.01);
U.S. Cl.
CPC ...
G06F 30/367 (2020.01);
Abstract

A system and method are provided for detectability analysis to identify defective analog components of a circuit. The method includes applying detectability analysis stimuli to the circuit for the purpose of identifying all detectable defects within a defect universe of the circuit, the defect universe including all actual, and potentially undetectable, defects in the circuit, and the applying resulting in an identification of first defects, which is a subset of all of the actual defects within the defect universe. The method further includes applying a user defect analysis to the circuit to identify second defects, which is a subset of all of the actual defects within the defect universe, determining defects, from the first defects, that are not included in the second defects to be not-covered (NC) defects, grouping the NC defects into clusters, and providing the grouped NC defects as a result of the defect detectability analysis.


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