Three-dimensional memory device and fabrication method thereof

Abstract

In one aspect, a three-dimensional (3D) memory device includes a first core region, a second core region, and an isolation region between the first and second core regions along a first direction, a stack in the first and second core regions and including alternatingly stacked first dielectric layers and conductor layers, gate line slit structures extending through the stack along a second direction perpendicular to the first direction in the first and second core regions, top select gate (TSG) cut structures extending through a portion of the stack along the second direction, and a first isolation structure extending through the stack along the second direction in the isolation region and contacting with the gate line slit structures. The gate line slit structures and the TSG cut structures extend along the first direction. One of the TSG cut structures is between two of the gate line slit structures along a third direction perpendicular to the first direction and the second direction.