The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 13, 2026

Filed:

Oct. 26, 2023
Applicant:

Yangtze Memory Technologies Co., Ltd., Wuhan, CN;

Inventors:

Zhefan Li, Wuhan, CN;

Huangpeng Zhang, Wuhan, CN;

Jiahao Chen, Wuhan, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/4076 (2006.01); G11C 11/4093 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4076 (2013.01); G11C 11/4093 (2013.01); G11C 2207/2254 (2013.01);
Abstract

According to one aspect of the present disclosure, a peripheral circuit is provided. The peripheral circuit may include a DQ circuit comprising a plurality of decision feedback equalization (DFE) components. The peripheral circuit may include a resistor offset calibration (RXOC) circuit. The RXOC circuit may include an oscillator. The oscillator may generate an internal clock source. The RXOC circuit may include a DQ-selection component. The DQ-selection component may select a DFE component of the plurality of DFE components for calibration. The DQ-selection component may output a slicer result signal indicating an offset value received from the DFE component. The RXOC circuit may include control logic. The control logic may send a calibration signal associated with the DFE component to the DQ circuit based on the slicer result signal.


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