The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 06, 2026

Filed:

Mar. 01, 2023
Applicant:

Hangzhou Silicon-magic Semiconductor Technology Co., Ltd., Hangzhou, CN;

Inventors:

Jiakun Wang, Hangzhou, CN;

Lvqiang Li, Hangzhou, CN;

Hui Chen, Hangzhou, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 62/10 (2025.01); H10D 62/13 (2025.01); H10D 64/00 (2025.01);
U.S. Cl.
CPC ...
H10D 62/111 (2025.01); H10D 62/107 (2025.01); H10D 62/127 (2025.01); H10D 62/157 (2025.01); H10D 64/117 (2025.01);
Abstract

Disclosed is a super-junction device, comprising a semiconductor substrate and a super-junction structure on a first surface of the semiconductor substrate. The super-junction structure includes first semiconductor pillars and second semiconductor pillars. The super-junction device has a cell region and a terminal region surrounding the cell region, the super-junction structure has a portion located in the cell region, and another portion located in the terminal region. The super-junction device further includes a guard ring located in the terminal region and surrounding the cell region, the guard ring includes doped regions extending segmentally and top-end portions of a first set of semiconductor pillars connecting the doped regions into a continuous ring. The top-end portions of the first set of semiconductor pillars in the guard ring are undoped, thus improving impurity distribution of the guard ring, charge balance in the terminal region, and voltage withstand performance of the super-junction device.


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