The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 30, 2025
Filed:
Sep. 23, 2022
Changxin Memory Technologies, Inc., Hefei, CN;
Xiaofei Sun, Hefei, CN;
Changhao Quan, Hefei, CN;
CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei, CN;
Abstract
A semiconductor package assembly and manufacturing method are provided. The assembly includes: a base plate having a first surface; a chip stacking structure located on the base plate, the chip stacking structure including multiple chips sequently stacked in a direction perpendicular to the base plate and being electrically connected to the first surface; an interposer located on the chip stacking structure and having a first interconnection surface, the first interconnection surface having first and second interconnection regions, and the first interconnection region being electrically connected to the base plate; and a molding compound sealing the chip stacking structure, interposer and first surface. The first interconnection region is not sealed by the molding compound and the second interconnection region is sealed by the compound. There is a preset height between a top surface of the molding compound on the second interconnection region and the first interconnection region.