The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 30, 2025
Filed:
Aug. 30, 2021
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Hsiu-Wen Hsueh, Taichung, TW;
Cai-Ling Wu, Hsinchu, TW;
Chii-Ping Chen, Hsinchu, TW;
Chien-Chih Chiu, Tainan County, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu, TW;
Abstract
A method includes forming a first conductive feature over a substrate, forming an etch-stop layer (ESL) stack over the first conductive feature, forming a first interlayer dielectric (ILD) layer over the ESL stack, forming a patterned ESL having a first opening over the first ILD layer, forming a second ILD layer over the patterned ESL, thereby filling the first opening, forming a patterned HM having a second opening over the second ILD layer, where a width of the second opening is greater than a width of the first opening, performing an etching process to form a first trench in the second ILD layer and a second trench in the first ILD layer, where the second trench exposes the first conductive feature, and subsequently depositing a conductive layer in the first trench and the second trench, thereby forming a second conductive feature interconnecting a third conductive to the first conductive feature.