The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 30, 2025
Filed:
Jan. 31, 2022
Applicant:
Texas Instruments Incorporated, Dallas, TX (US);
Inventors:
Bhaskar Srinivasan, Allen, TX (US);
Pushpa Mahalingam, Richardson, TX (US);
Mahalingam Nandakumar, Richardson, TX (US);
Mona Eissa, Allen, TX (US);
Corinne Gagnet, Dallas, TX (US);
Christopher Whitesell, Garland, TX (US);
Assignee:
TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US);
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H10D 64/66 (2025.01); H01L 21/28 (2006.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01); H10D 84/83 (2025.01);
U.S. Cl.
CPC ...
H01L 21/28052 (2013.01); H10D 64/663 (2025.01); H10D 84/0137 (2025.01); H10D 84/038 (2025.01); H10D 84/83 (2025.01);
Abstract
A system and method for growing fine grain polysilicon. In one example, the method of forming an integrated circuit includes forming a dielectric layer over a semiconductor substrate, and forming a polysilicon layer over the dielectric layer. The polysilicon layer is formed by a chemical vapor deposition process that includes providing a gas flow including disilane and hydrogen gas over the semiconductor substrate.