The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 30, 2025

Filed:

Jan. 14, 2022
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Hidehiro Fujiwara, Hsinchu, TW;

Haruki Mori, Hsinchu, TW;

Wei-Chang Zhao, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 15/78 (2006.01); G06F 7/544 (2006.01); G06F 17/16 (2006.01);
U.S. Cl.
CPC ...
G06F 7/5443 (2013.01); G06F 15/7821 (2013.01); G06F 17/16 (2013.01);
Abstract

A memory device has a memory array including a memory segment to store weight data, a weight buffer coupled to the memory segment and configured to hold new weight data to be updated in the memory segment, a logic circuit, and a computation circuit coupled to an output of the logic circuit. The logic circuit further has a first input coupled to the memory segment by a bit line, and a second input configured to receive input data. The logic circuit is configured to generate, at the output, intermediate data corresponding to the input data and the weight data read from the memory segment through the bit line. The computation circuit is configured to, based on the intermediate data, generate output data corresponding to a computation performed on the input data and the weight data read from the at least one memory segment.


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