Memory devices and operation methods thereof, and memory systems for managing page buffer

Abstract

Examples of the present disclosure provide a memory device and an operation method thereof, and a memory system. The memory device includes: a memory cell array including memory cells, wherein the memory cells are divided into memory planes; bit lines; page buffer circuits, wherein each of the page buffer circuits includes page buffer groups, and corresponds to one of the memory planes, and the page buffer circuit performs a buffer operation in response to a buffer operation command; and a control logic coupled to the page buffer groups and configured to: for each of the memory planes, provide the buffer operation command to the plurality of page buffer groups, and control performing time periods for the page buffer groups to perform the buffer operation such that some performing time periods among the plurality of performing time periods overlaps.