The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 23, 2025

Filed:

Nov. 28, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Yu-Shao Cheng, Hsinchu, TW;

Chui-Ya Peng, Hsinchu, TW;

Kung-Wei Lee, Hsinchu, TW;

Shin-Yeu Tsai, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/3205 (2006.01); H01L 21/02 (2006.01); H01L 21/28 (2025.01); H01L 21/311 (2006.01); H01L 21/8222 (2006.01); H01L 21/8238 (2006.01); H01L 27/06 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H10B 10/00 (2023.01); H10B 20/25 (2023.01); H10D 10/01 (2025.01); H10D 30/01 (2025.01); H10D 30/64 (2025.01); H10D 64/01 (2025.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01); H10D 84/40 (2025.01); H10D 84/85 (2025.01);
U.S. Cl.
CPC ...
H10D 84/85 (2025.01); H01L 21/02164 (2013.01); H01L 21/0228 (2013.01); H01L 21/28247 (2013.01); H01L 21/31111 (2013.01); H01L 21/31116 (2013.01); H01L 21/32051 (2013.01); H01L 21/32055 (2013.01); H10B 10/00 (2023.02); H10B 20/25 (2023.02); H10D 10/01 (2025.01); H10D 30/028 (2025.01); H10D 30/64 (2025.01); H10D 64/015 (2025.01); H10D 84/0112 (2025.01); H10D 84/0165 (2025.01); H10D 84/0179 (2025.01); H10D 84/0184 (2025.01); H10D 84/038 (2025.01); H10D 84/401 (2025.01);
Abstract

A method of making a semiconductor device includes forming a first polysilicon structure over a first portion of a substrate. The method further includes forming a first spacer on a sidewall of the first polysilicon structure, wherein the first spacer has a concave corner region between an upper portion and a lower portion. The method further includes forming a protective layer covering an entirety of the first spacer and the first polysilicon structure, wherein the protective layer has a first thickness over the concave corner region and a second thickness over the first polysilicon structure, and a difference between the first thickness and the second thickness is at most 10% of the second thickness.


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