The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 23, 2025

Filed:

Jan. 31, 2023
Applicant:

Shanghai Huali Integrated Circuit Corporation, Shanghai, CN;

Inventors:

Weiwei MA, Shanghai, CN;

Ran Huang, Shanghai, CN;

Wei Zhou, Shanghai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H10B 10/00 (2023.01); H10B 69/00 (2023.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01);
U.S. Cl.
CPC ...
H10D 84/038 (2025.01); H10B 10/12 (2023.02); H10B 69/00 (2023.02); H10D 84/0179 (2025.01);
Abstract

A method is disclosed for manufacturing a high dielectric constant metal gate of NMOS and PMOS, comprising: stepforming an interface layer; stepforming a high dielectric constant layer; stepperforming decoupled plasma nitridation; stepperforming plasma nitridation annealing with a temperature set below a preset first temperature to reduce the number of oxygen vacancies in the high dielectric constant layer; stepforming a P-type work function metal layer; stepremoving the P-type work function metal layer from the region of the gate structure of the NMOS; stepforming an N-type work function metal layer, wherein metal atoms of the N-type work function metal layer of a first NMOS diffuses laterally from an interface to the P-type work function metal layer of adjacent first PMOS and are fixed at the oxygen vacancies by forming a dipole; and stepforming the metal gate.


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