The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 16, 2025

Filed:

Jul. 26, 2022
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;

Inventors:

Chern-Yow Hsu, Chu-Bei, TW;

Chung-Chiang Min, Zhubei, TW;

Shih-Chang Liu, Alian Township, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10N 70/00 (2023.01); H10B 61/00 (2023.01); H10B 63/00 (2023.01); H10N 50/01 (2023.01); H10N 50/80 (2023.01); H10N 70/20 (2023.01);
U.S. Cl.
CPC ...
H10N 70/063 (2023.02); H10B 61/22 (2023.02); H10B 63/30 (2023.02); H10N 50/01 (2023.02); H10N 50/80 (2023.02); H10N 70/24 (2023.02); H10N 70/826 (2023.02); H10N 70/841 (2023.02);
Abstract

A memory device with hard mask insulator and its manufacturing methods are provided. In some embodiments, the memory device includes a memory cell stack disposed over a substrate. The memory cell stack includes a bottom electrode layer, a resistance switching dielectric layer over the bottom electrode layer, and a top electrode layer over the resistance switching dielectric layer. A first insulating layer is disposed over the top electrode layer, and a first metal hard masking layer disposed over the first insulating layer.


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