The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 16, 2025

Filed:

Sep. 26, 2023
Applicant:

Rambus Inc., San Jose, CA (US);

Inventors:

Thomas Vogelsang, Mountain View, CA (US);

Torsten Partsch, San Jose, CA (US);

Assignee:

Rambus Inc., San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01); G11C 11/4091 (2006.01); G11C 11/4096 (2006.01); G11C 29/52 (2006.01);
U.S. Cl.
CPC ...
G11C 29/52 (2013.01); G11C 11/4091 (2013.01); G11C 11/4096 (2013.01);
Abstract

A memory includes a local control circuitry that manages scrub transactions using a set of sense amplifiers separate from those used for access (read and write) transactions. The local control circuitry interrupts scrub transactions to prioritize access requests, thereby offering improved memory performance. The local control circuitry also divides scrub transactions into phases and periods based on whether the scrub transaction requires access to bitlines used for read and write access. This division allows the local control circuitry to interleave and interrupt scrub transactions with access transactions in a manner that minimizes access interference.


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