The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 09, 2025
Filed:
Oct. 06, 2022
Denso Corporation, Kariya, JP;
Toyota Jidosha Kabushiki Kaisha, Toyota, JP;
Mirise Technologies Corporation, Nisshin, JP;
Hamamatsu Photonics K.k., Hamamatsu, JP;
Takashi Ushijima, Nisshin, JP;
Kozo Kato, Nisshin, JP;
Yoshitaka Nagasato, Nisshin, JP;
Masatake Nagaya, Nisshin, JP;
Shinichi Hoshi, Nisshin, JP;
Daisuke Kawaguchi, Hamamatsu, JP;
Keisuke Hara, Hamamatsu, JP;
DENSO CORPORATION, Kariya, JP;
TOYOTA JIDOSHA KABUSHIKI KAISHA, Toyota, JP;
MIRISE Technologies Corporation, Nisshin, JP;
HAMAMATSU PHOTONICS K.K., Hamamatsu, JP;
Abstract
A method of manufacturing a semiconductor device includes a trench forming step, a laser irradiation step and a peeling step. In the trench forming step, a trench is formed on a first main surface of a semiconductor substrate having a device structure formed thereon. In the laser irradiation step, a laser is irradiated from a second main surface of the semiconductor substrate to a plane surface that is positioned and extends at a predetermined depth of the semiconductor substrate. In the peeling step, a device layer is peeled off from the semiconductor substrate along the plane surface on which the laser is irradiated. The peeling step may be performed in a state in which the trenches are either unfilled or filled with a material having a lower coefficient of thermal expansion than the semiconductor substrate.