The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 02, 2025
Filed:
Jun. 29, 2022
Intel Corporation, Santa Clara, CA (US);
Kannan Rajamani, Basking Ridge, NJ (US);
Kameran Azadet, San Ramon, CA (US);
Kevin Kinney, Coopersburg, PA (US);
Thomas Smith, Colmar, PA (US);
Zoran Zivkovic, Hertogenbosch, NL;
Intel Corporation, Santa Clara, CA (US);
Abstract
Techniques are disclosed for the use of a hybrid architecture that combines a programmable processing array and a hardware accelerator. The hybrid architecture functions to maintain synchronization between data samples to be transmitted and a measured or observed transmission of the data samples. By comparing these blocks of data samples, DFE functions such as digital pre-distortion (DPD) parameter adaptation may be implemented. The hybrid architecture enables high flexibility at low additional cost. To further limit the costs, the programable processing array may have processing power and memory that is reduced compared to conventional processing array implementations.