The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 25, 2025

Filed:

May. 14, 2024
Applicant:

Innoscience (Zhuhai) Technology Co., Ltd., Zhuhai, CN;

Inventors:

Anbang Zhang, Zhuhai, CN;

King Yuen Wong, Zhuhai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 64/00 (2025.01); H01L 23/31 (2006.01); H10D 30/01 (2025.01); H10D 30/47 (2025.01); H10D 62/824 (2025.01); H10D 62/85 (2025.01); H10D 64/27 (2025.01);
U.S. Cl.
CPC ...
H10D 64/118 (2025.01); H01L 23/3171 (2013.01); H01L 23/3192 (2013.01); H10D 30/015 (2025.01); H10D 30/475 (2025.01); H10D 62/824 (2025.01); H10D 62/8503 (2025.01); H10D 64/411 (2025.01);
Abstract

Some embodiments of the disclosure provide a semiconductor device. The semiconductor device comprises: a substrate; a first nitride semiconductor layer on the substrate; a second nitride semiconductor layer on the first nitride semiconductor layer and having a band gap greater than a band gap of the first nitride semiconductor layer; a group III-V dielectric layer disposed on the second nitride semiconductor layer; a gate electrode disposed on the second nitride semiconductor layer; and a first passivation layer disposed on the group III-V dielectric layer, wherein the group III-V dielectric layer is separated from the gate electrode by the first passivation layer.


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