The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 25, 2025
Filed:
May. 20, 2022
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Shi Ning Ju, Hsinchu, TW;
Wen-Ting Lan, Hsinchu, TW;
I-Han Huang, Hsinchu, TW;
Kuo-Cheng Chiang, Hsinchu, TW;
Chih-Hao Wang, Hsinchu, TW;
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Abstract
A method of manufacturing a semiconductor device structure includes bonding a device substrate to a first de-bond layer. The first de-bond layer is disposed on a first carrier substrate, and the device substrate has a first side facing the first carrier substrate and a second side opposite from the first side. The device substrate has a first width. A front-end-of-line (FEOL) process and a back-end-of-line (BEOL) process are performed on the device substrate. A second carrier substrate having a second de-bond layer is bonded on the second side of the device substrate. The first carrier substrate is removed by removing the first de-bond layer. A width of the device substrate remains the first width after removing the first carrier substrate.