The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 11, 2025

Filed:

Jun. 13, 2024
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Eugene I-Chun Chen, Taipei, TW;

Kuan-Liang Liu, Pingtung, TW;

Szu-Yu Wang, Hsinchu, TW;

Chia-Shiung Tsai, Hsin-Chu, TW;

Ru-Liang Lee, Hsinchu, TW;

Chih-Ping Chao, Hsin-Chu, TW;

Alexander Kalnitsky, San Francisco, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 87/00 (2025.01); H01L 21/02 (2006.01); H01L 21/762 (2006.01);
U.S. Cl.
CPC ...
H10D 87/00 (2025.01); H01L 21/76275 (2013.01); H01L 21/76283 (2013.01); H01L 21/02381 (2013.01); H01L 21/02532 (2013.01); H01L 21/02595 (2013.01); H01L 21/02658 (2013.01);
Abstract

The present disclosure relates to an integrated chip. The integrated chip includes an epitaxial layer arranged on a semiconductor body. A trap-rich layer is arranged on the epitaxial layer, a dielectric layer is arranged on the trap-rich layer, and an active semiconductor layer is arranged on the dielectric layer. A semiconductor material is arranged on the epitaxial layer and laterally beside the active semiconductor layer. The epitaxial layer continuously extends from directly below the trap-rich layer to directly below the semiconductor material.


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