The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 11, 2025
Filed:
Jun. 22, 2022
Programmable application-specific array for protecting confidentiality and integrity of hardware ips
University of Florida Research Foundation, Incorporated, Gainesville, FL (US);
Intel Corporation, Santa Clara, CA (US);
Swarup Bhunia, Gainesville, FL (US);
Aritra Dasgupta, Gainesville, FL (US);
Pravin Gaikwad, Gainesville, FL (US);
Md Moshiur Rahman, Gainesville, FL (US);
Aritra Bhattacharyay, Gainesville, FL (US);
Nij Dorairaj, Santa Clara, CA (US);
David Kehlet, Santa Clara, CA (US);
University of Florida Research Foundation, Incorporated, Gainesville, FL (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A method and system are directed to protecting hardware IP, particularly of ASIC designs. Programmability is introduced into an ASIC design to increase the difficulty of formulating ASIC designs as Boolean Satisfiability (SAT) problems. Fine-grain redaction of security-critical information from a design is employed by removing high-entropy logic blocks and subsequently inserting programmable components in place of the redacted portion to hide the actual design intent.