The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 04, 2025

Filed:

Aug. 15, 2022
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Li-Sheng Weng, San Diego, CA (US);

Suresh Ramalingam, Fremont, CA (US);

Assignee:

XILINX, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/538 (2006.01); H01L 21/50 (2006.01); H01L 23/498 (2006.01); H10D 1/20 (2025.01); H10D 1/68 (2025.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5389 (2013.01); H01L 21/50 (2013.01); H01L 23/49816 (2013.01); H01L 23/5383 (2013.01); H01L 23/5384 (2013.01); H01L 23/5385 (2013.01); H01L 23/5386 (2013.01); H10D 1/20 (2025.01); H10D 1/68 (2025.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 24/32 (2013.01); H01L 24/73 (2013.01); H01L 2224/13147 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/73204 (2013.01);
Abstract

A chip package and methods for fabricating the same are provided that include integrated devices embedded and coupled in series between a lower surface of a package substrate and an integrated circuit die of the chip package. In some examples, the integrated devices are disposed side by side embedded in a common package substrate. In other examples, one of the series coupled integrated devices is embedded in a first package substrate while another of the series coupled integrated devices is embedded in a second package substrate that is stacked directly in contact with the first package substrate. The integrated devices may be passive and/or active integrated devices.


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