The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 21, 2025

Filed:

Jan. 27, 2022
Applicant:

Xiamen San'an Integrated Circuit Co., Ltd., Xiamen, CN;

Inventors:

Wenbi Cai, Xiamen, CN;

Cheng Liu, Xiamen, CN;

Nien-Tze Yeh, Xiamen, CN;

Yuci Lin, Xiamen, CN;

Jie Zhao, Xiamen, CN;

Yuyu Liang, Xiamen, CN;

Jian Yang, Xiamen, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/02 (2006.01); H01L 21/8252 (2006.01); H01L 23/538 (2006.01); H01L 27/07 (2006.01); H10D 84/05 (2025.01); H10D 84/40 (2025.01); H10D 89/10 (2025.01);
U.S. Cl.
CPC ...
H10D 89/10 (2025.01); H01L 23/5384 (2013.01); H01L 23/5386 (2013.01); H10D 84/05 (2025.01); H10D 84/403 (2025.01);
Abstract

A microelectronic device includes a substrate, at least two doped well regions, an epitaxial structure, and at least two power elements. The doped well regions are disposed in the substrate, and are spaced apart from each other. Each of the doped well regions has a doping type opposite to that of the substrate. The epitaxial structure is disposed on the substrate, and is in contact with the doped well regions. The power elements are disposed on the epitaxial structure opposite to the substrate, and are cascade connected with each other. A low potential terminal of each of the power elements is electrically connected to a respective one of the doped well regions. A method for making the microelectronic device is also provided.


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