The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 21, 2025
Filed:
Nov. 01, 2022
Applicant:
SK Hynix Inc., Gyeonggi-do, KR;
Inventors:
Heon Yong Chang, Gyeonggi-do, KR;
Sun Joo Park, Gyeonggi-do, KR;
Assignee:
SK hynix Inc., Gyeonggi-do, KR;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 21/66 (2006.01); H01L 23/58 (2006.01);
U.S. Cl.
CPC ...
H01L 23/564 (2013.01); H01L 22/32 (2013.01); H01L 23/562 (2013.01); H01L 23/585 (2013.01);
Abstract
A semiconductor wafer includes at least one chip region disposed in a substrate, a first chip guard disposed over the substrate in a chip sealing region positioned outside the at least one chip region, a second chip guard disposed over the substrate in a scribe lane region positioned outside the chip sealing region, and a test circuit pattern disposed in the scribe lane region and including a ground line electrically connected to a ground well in the substrate. The second chip guard includes a ground wiring layer electrically connected to the ground line of the test circuit pattern.