The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 21, 2025
Filed:
May. 02, 2022
International Business Machines Corporation, Armonk, NY (US);
Tao Li, Slingerlands, NY (US);
Liqiao Qin, Albany, NY (US);
Mukta Ghate Farooq, Hopewell Jct, NY (US);
Ruilong Xie, Niskayuna, NY (US);
Kisik Choi, Watervliet, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
An approach for forming semiconductor structure composed of one or more stacked semiconductor devices with a first semiconductor device on a substrate, a first interconnect wiring structure over the first semiconductor device, a second interconnect wiring structure under a second semiconductor device joined to the first interconnect wiring structure, and a third interconnect wiring structure on the second semiconductor device where the first semiconductor device and the second semiconductor device are each one of a memory device or a logic device. The approach includes each of the first interconnect wiring structure, the second interconnect wiring structure, and the third interconnect wiring structure with a contact pitch to the first semiconductor device and to both sides of the second semiconductor device that is less than one hundred nanometers.