The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 14, 2025
Filed:
Dec. 03, 2021
Tokyo Electron Limited, Tokyo, JP;
Daniel Chanemougame, Albany, NY (US);
Lars Liebmann, Albany, NY (US);
Jeffrey Smith, Albany, NY (US);
Paul Gutwin, Albany, NY (US);
Xiaoqing Xu, Austin, TX (US);
TOKYO ELECTRON LIMITED, Tokyo, JP;
Abstract
Aspects of the present disclosure provide a multi-tier semiconductor structure. For example, the multi-tier semiconductor structure can include a first semiconductor device tier that includes first semiconductor devices. A first signal wiring structure can be formed over and electrically connected to the first semiconductor device tier. An insulator layer can be formed over the first signal wiring structure. A second semiconductor device tier can be formed over the insulator layer, the second semiconductor device tier including second semiconductor devices. A second signal wiring structure can be formed over and electrically connected to the second semiconductor device tier. An inter-tier via can be formed vertically through the insulator layer and electrically connecting the second signal wiring structure to the first signal wiring structure. The first semiconductor device tier, the second semiconductor device tier and the inter-tier via can be formed monolithically.