The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 14, 2025

Filed:

Jun. 29, 2023
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Hsin-Wen Su, Yunlin County, TW;

Yu-Kuan Lin, Taipei, TW;

Lien-Jung Hung, Taipei, TW;

Ping-Wei Wang, Hsinchu, TW;

Chia-En Huang, Hsinchu County, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10D 62/83 (2025.01); H10B 20/25 (2023.01); H10D 62/10 (2025.01); H10D 62/40 (2025.01); H10D 64/01 (2025.01);
U.S. Cl.
CPC ...
H10D 64/017 (2025.01); H10B 20/25 (2023.02); H10D 62/126 (2025.01); H10D 62/405 (2025.01);
Abstract

A memory device includes a substrate, an active region, a first gate structure, a second gate structure, a first word line, and a second word line. The active region protrudes from a top surface of the substrate. The active region has at least one ring structure, in which when viewed from above, the ring structure has a first linear portion, a second linear portion, a first curved portion, and a second curved portion, the first curved portion connects first sides of the first and second linear portions, and the second curved portion connects second sides of the first and second linear portions. The first gate structure and the second gate structure are over the substrate and cross the active region. The first word line and the second word line are electrically connected to the first gate structure and the second gate structure, respectively.


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