The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 07, 2025

Filed:

Jan. 04, 2022
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Fatma Arzum Simsek-Ege, Boise, ID (US);

Steve V. Cole, Boise, ID (US);

Scott J. Derner, Boise, ID (US);

Toby D. Robbs, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 30/63 (2025.01); G11C 11/22 (2006.01); G11C 11/4091 (2006.01); H10B 12/00 (2023.01); H10B 51/10 (2023.01); H10D 30/01 (2025.01);
U.S. Cl.
CPC ...
H10D 30/63 (2025.01); G11C 11/223 (2013.01); G11C 11/4091 (2013.01); H10B 12/03 (2023.02); H10B 12/053 (2023.02); H10B 12/34 (2023.02); H10B 12/48 (2023.02); H10B 51/10 (2023.02); H10D 30/025 (2025.01);
Abstract

An apparatus, such as a memory array, can have a memory cell coupled to a first digit line (e.g., a local digit line) at a first level. A second digit line (e.g., hierarchical digit line) at a second level can be coupled to a main sense amplifier. A charge sharing device at a third level between the first and second levels can be coupled to the first digit line and to a connector. A vertical transistor at the third level can be coupled between the first digit line and the connector. A contact can be coupled between the connector and the second digit line.


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