The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 07, 2025

Filed:

Apr. 27, 2022
Applicants:

Stmicroelectronics Pte Ltd, Singapore, SG;

Stmicroelectronics (Tours) Sas, Tours, FR;

Inventors:

Shin Phay Lee, Singapore, SG;

Voon Cheng Ngwan, Singapore, SG;

Frederic Lanois, Tours, FR;

Fadhillawati Tahir, Singapore, SG;

Ditto Adnan, Singapore, SG;

Assignees:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 12/00 (2025.01); H10D 12/01 (2025.01); H10D 64/00 (2025.01);
U.S. Cl.
CPC ...
H10D 12/211 (2025.01); H10D 12/021 (2025.01); H10D 64/117 (2025.01);
Abstract

A trench in a semiconductor substrate is lined with a first insulation layer. A hard mask layer deposited on the first insulation layer is used to control performance of an etch that selectively removes a first portion of the first insulating layer from an upper trench portion while leaving a second portion of first insulating layer in a lower trench portion. After removing the hard mask layer, an upper portion of the trench is lined with a second insulation layer. An opening in the trench that includes a lower open portion delimited by the second portion of first insulating layer in the lower trench portion and an upper open portion delimited by the second insulation layer at the upper trench portion, is then filled by a single deposition of polysilicon material forming a unitary gate/field plate conductor of a field effect rectifier diode.


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