The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 30, 2025

Filed:

Oct. 03, 2022
Applicant:

Shanghai Huali Integrated Circuit Corporation, Shanghai, CN;

Inventors:

Xiaoliang Tang, Shanghai, CN;

Haoyu Chen, Shanghai, CN;

Hua Shao, Shanghai, CN;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/28 (2006.01); H10D 64/01 (2025.01); H10D 64/66 (2025.01);
U.S. Cl.
CPC ...
H01L 21/28123 (2013.01); H01L 21/28079 (2013.01); H10D 64/017 (2025.01); H10D 64/665 (2025.01);
Abstract

The present application discloses a method for manufacturing a high-voltage metal gate device. After the deposition of a gate metal through a normal process, in CMP processes performed to the gate metal, firstly a first CMP process is performed to thin the gate metal to a certain thickness in advance, then a blocking dielectric layer is deposited, a large-area high-voltage gate region is opened through photolithography, and the blocking dielectric layer other than the blocking dielectric layer in the large-area high-voltage gate region is removed through etching. In a second CMP process performed to the gate metal, due to the blocking dielectric layer on the surface of the large-area gate metal in the high-voltage gate region, the polishing speed is slow, and CMP dishing will not be caused.


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