Restructuring algorithm for including user-specified clock instances in a post-cts clock tree

Abstract

A clock tree generated through clock tree synthesis (CTS) for an integrated circuit (IC) design is stored in memory. The IC design includes a post post-CTS clock tree that includes a plurality of clock nets. A request to add a user-specified clock instance to the post-CTS clock tree is received and all logically equivalent clock nets in the post-CTS clock tree detected to generate a set of candidate clock nets. A reduced set of candidate clock nets is generated from the set of candidate clock nets based on a distance between each candidate clock net and the clock instance. One candidate clock net in the reduced set is selected based on a length of conductive traces required to interconnect the corresponding candidate clock net and the clock instance. The post-CTS clock tree is restructured to connect the clock instance to the selected one of the candidate clock nets.