The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 16, 2025

Filed:

Sep. 07, 2022
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Anna Maria Conti, Milan, IT;

Paolo Tessariol, Arcore, IT;

Umberto Maria Meotto, Dietlikon, CH;

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01); H10B 41/10 (2023.01); H10B 41/20 (2023.01); H10B 41/35 (2023.01); H10B 43/10 (2023.01); H10B 43/20 (2023.01); H10B 43/35 (2023.01);
U.S. Cl.
CPC ...
G11C 16/0483 (2013.01); H10B 41/10 (2023.02); H10B 41/20 (2023.02); H10B 41/35 (2023.02); H10B 43/10 (2023.02); H10B 43/20 (2023.02); H10B 43/35 (2023.02);
Abstract

A microelectronic device comprises a stack structure overlying a source tier. The stack structure comprises a vertically alternating sequence of conductive structures and insulative structures arranged in tiers. The microelectronic device comprises a staircase structure within the stack structure and having steps comprising lateral edges of the tiers, conductive contacts within a horizontal area of the staircase structure and vertically extending through the stack structure to the source tier, and strapping structures laterally adjacent to the conductive contacts and having upper surfaces substantially coplanar with upper surfaces of the conductive contacts. Each of the strapping structures are in contact with one of the conductive contacts and with one of the conductive structures of the stack structure at one of the steps of the staircase structure. Related memory devices, electronic systems, and methods of forming the microelectronic devices are also described.


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