The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 16, 2025
Filed:
Apr. 26, 2023
Applicant:
Invention and Collaboration Laboratory Pte. Ltd., Singapore, SG;
Inventor:
Chao-Chun Lu, Taipei, TW;
Assignees:
Invention And Collaboration Laboratory Pte. Ltd., Singapore, SG;
Etron Technology, Inc., Hsinchu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/4091 (2006.01); G11C 11/4097 (2006.01); H01L 25/065 (2023.01); H10B 80/00 (2023.01);
U.S. Cl.
CPC ...
G11C 11/4091 (2013.01); G11C 11/4097 (2013.01); H01L 25/0655 (2013.01); H10B 80/00 (2023.02);
Abstract
A semiconductor memory structure includes a plurality of DRAM cells, a bit line, and a sense amplifier. Each DRAM cell includes an access transistor and a storage capacitor. The bit line has a first terminal extended along the plurality of DRAM cells to a second terminal, and the bit line is coupled to each access transistor of the plurality of DRAM cells. The sense amplifier is coupled to the first terminal of the bit line. A capacitance of the bit line per DRAM cell is lower than 20×10fF.