The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 09, 2025

Filed:

Sep. 26, 2022
Applicant:

United Microelectronics Corp., Hsin-Chu, TW;

Inventors:

Liang Yi, Singapore, SG;

Chi Ren, Singapore, SG;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 41/30 (2023.01); H10B 41/10 (2023.01); H10B 41/46 (2023.01);
U.S. Cl.
CPC ...
H10B 41/30 (2023.02); H10B 41/10 (2023.02); H10B 41/46 (2023.02);
Abstract

A memory device includes a semiconductor substrate, isolation structures, an erase gate, and floating gates. The isolation structures are disposed in the semiconductor substrate. Active regions separated from one another are defined in the semiconductor substrate by the isolation structures, and each of the active regions is elongated in a first direction. The erase gate is disposed on the semiconductor substrate and elongated in a second direction. The erase gate is disposed on the active regions and the isolation structures, and the erase gate is partly disposed in a recess within each of the isolation structures. The floating gates are disposed on the semiconductor substrate. The floating gates are arranged in the second direction and separated from one another, and each of the floating gates is partly disposed under the erase gate in a vertical direction.


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