The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 09, 2025
Filed:
Jun. 22, 2022
International Business Machines Corporation, Armonk, NY (US);
Ruilong Xie, Niskayuna, NY (US);
Junli Wang, Sr., Slingerlands, NY (US);
Kisik Choi, Watervliet, NY (US);
Julien Frougier, Albany, NY (US);
Reinaldo Vega, Mahopac, NY (US);
Lawrence A. Clevenger, Saratoga Springs, NY (US);
Albert M. Chu, Nashua, NH (US);
Brent A. Anderson, Jericho, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A semiconductor device is provided. The semiconductor device includes a field effect transistor (FET) including first and second source/drain (S/D) epitaxial regions. The semiconductor device also includes a gate cut region at cell boundaries between the first and second S/D epitaxial regions, a dielectric liner and a dielectric core formed in the gate cut region, and a backside power rail (BPR) and a backside power distribution network (BSPDN). The semiconductor device also includes a power via passing through the dielectric core and connecting to the BPR and BSPDN, first metal contacts formed in contact with the first and second S/D epitaxial regions, and a via to backside power rail (VBPR) contact. The dielectric liner separates the power via from the first S/D epitaxial region.