The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 09, 2025

Filed:

Dec. 20, 2024
Applicant:

Adeia Semiconductor Bonding Technologies Inc., San Jose, CA (US);

Inventors:

Ron Zhang, Sunnyvale, CA (US);

Gaius Gillman Fountain, Jr., Youngsville, NC (US);

Laura Wills Mirkarimi, Sunol, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/46 (2006.01); H01L 23/00 (2006.01); H01L 23/538 (2006.01); H01L 25/07 (2006.01);
U.S. Cl.
CPC ...
H01L 23/46 (2013.01); H01L 23/5385 (2013.01); H01L 24/08 (2013.01); H01L 24/32 (2013.01); H01L 25/074 (2013.01); H01L 2224/08245 (2013.01); H01L 2224/32225 (2013.01); H01L 2225/06589 (2013.01);
Abstract

A device package comprising an integrated cooling assembly. The device package comprises a semiconductor device attached to a substrate and a cold plate attached to the semiconductor device. The cold plate's footprint is larger than the footprint of the semiconductor device so one or more portions of the cold plate extends past the edges of the semiconductor device's footprint. One or more standoffs are disposed adjacent to the semiconductor device to support the one or more portions of the cold plate that extend past the edges of the semiconductor device's footprint.


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