The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 09, 2025

Filed:

Apr. 21, 2021
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Yi-Nien Su, Hsinchu, TW;

Yu-Yu Chen, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 21/033 (2006.01); H01L 21/311 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76802 (2013.01); H01L 21/0338 (2013.01); H01L 21/31144 (2013.01); H01L 21/76829 (2013.01); H01L 21/76877 (2013.01);
Abstract

Embodiments of the present disclosure provide methods for forming conductive lines with dielectric cut features. Particularly, embodiments of present disclosure provide a method for forming conductive line pattern using two patterning processes. A line pattern is formed in the first patterning process. A cut pattern is formed over the line pattern in the second patterning process. The cut pattern is formed by forming cut openings with a width smaller than the line width of the line pattern and then filling the cut opening with a mask material.


Find Patent Forward Citations

Su, Yi-Nien. (2025). Method for reducing line end spacing and semiconductor devices manufactured thereof (U.S. Patent No. 12412778). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12412778

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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