The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 02, 2025

Filed:

Dec. 15, 2023
Applicant:

Adeia Semiconductor Bonding Technologies Inc., San Jose, CA (US);

Inventors:

Cyprian Emeka Uzoh, San Jose, CA (US);

Laura Wills Mirkarimi, Sunol, CA (US);

Guilian Gao, Campbell, CA (US);

Gaius Gillman Fountain, Jr., Youngsville, NC (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/00 (2006.01); H01L 21/18 (2006.01); H01L 21/683 (2006.01); H01L 21/78 (2006.01); H01L 23/00 (2006.01); H01L 25/065 (2023.01);
U.S. Cl.
CPC ...
H01L 25/50 (2013.01); H01L 21/187 (2013.01); H01L 21/6836 (2013.01); H01L 21/78 (2013.01); H01L 24/27 (2013.01); H01L 24/30 (2013.01); H01L 24/83 (2013.01); H01L 25/0657 (2013.01); H01L 2224/83011 (2013.01); H01L 2224/83013 (2013.01);
Abstract

Representative techniques provide process steps for forming a microelectronic assembly, including preparing microelectronic components such as dies, wafers, substrates, and the like, for bonding. One or more surfaces of the microelectronic components are formed and prepared as bonding surfaces. The microelectronic components are stacked and bonded without adhesive at the prepared bonding surfaces.


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