The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 26, 2025

Filed:

Oct. 27, 2022
Applicant:

Powerchip Semiconductor Manufacturing Corporation, Hsinchu, TW;

Inventors:

Jih-Wen Chou, Hsinchu, TW;

Chih-Hung Lu, Taichung, TW;

Bo-An Tsai, Hsinchu, TW;

Zheng-Chang Mu, Hsinchu County, TW;

Po-Hsien Yeh, Hsinchu County, TW;

Robin Christine Hwang, Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 30/47 (2025.01); H10D 30/01 (2025.01); H10D 62/10 (2025.01); H10D 62/85 (2025.01);
U.S. Cl.
CPC ...
H10D 30/475 (2025.01); H10D 30/015 (2025.01); H10D 30/47 (2025.01); H10D 62/10 (2025.01); H10D 62/102 (2025.01); H10D 62/124 (2025.01); H10D 62/8503 (2025.01);
Abstract

A high electron mobility transistor device including a channel layer, a first barrier layer, and a P-type gallium nitride layer is provided. The first barrier layer is disposed on the channel layer. The P-type gallium nitride layer is disposed on the first barrier layer. The first thickness of the first barrier layer located directly under the P-type gallium nitride layer is greater than the second thickness of the first barrier layer located on two sides of the P-type gallium nitride layer.


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