The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 26, 2025
Filed:
Jul. 13, 2023
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Ishan Khera, Hsinchu, TW;
Atul Katoch, Kanata, CA;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Abstract
Systems and methods are provided for a memory device including a first memory array, a local input/output (LIO) circuit, and a global input/output (GIO) circuit. The first memory array includes a memory cell and a local bit line. The LIO circuit is configured to receive a local bit line signal on the local bit line and to generate a global bit line signal on a global bit line based on the local bit line signal. The GIO circuit is coupled to the LIO circuit and is configured to receive the global bit line signal. The GIO circuit comprises a latch circuit including a global bit line signal latch that is configured to latch the global bit line signal, and a booster circuit that is configured to drive the global bit line signal in the GIO circuit based on a previous global bit line signal.