The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 19, 2025

Filed:

Nov. 21, 2022
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Po-Chun Wang, Hsinchu, TW;

Hui-Zhong Zhuang, Kaohsiung, TW;

Chih-Liang Chen, Hsinchu, TW;

Jerry Chang-Jui Kao, Taipei, TW;

Tzu-Ying Lin, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/3187 (2006.01); H03K 3/037 (2006.01); H10D 30/01 (2025.01); H10D 30/62 (2025.01); H10D 89/10 (2025.01);
U.S. Cl.
CPC ...
H03K 3/037 (2013.01); G01R 31/3187 (2013.01); H10D 30/024 (2025.01); H10D 30/6219 (2025.01); H10D 89/10 (2025.01);
Abstract

An integrated circuit includes first bit cells, second bit cells, and clock cells. Each of first bit cells is arranged in one of multiple first cell rows having a first row height. Each of the second bit cells is arranged in one of multiple second cells rows having a second row height different from the first row height. The second bit cells extend to pass the first bit cells in a first direction. The clock cells are arranged in peripheral regions of a multi-bit flip flop cell in the first cell rows. The first and second bit cells and the clock cells are included in the multi-bit flip flop cell.


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