The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 05, 2025

Filed:

Jun. 07, 2022
Applicant:

Macom Technology Solutions Holdings, Inc., Lowell, MA (US);

Inventors:

Chris Hardiman, Morrisville, NC (US);

Kyoung-Keun Lee, Cary, NC (US);

Kyle Bothe, Cary, NC (US);

Fabian Radulescu, Chapel Hill, NC (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 64/27 (2025.01); H01L 21/285 (2006.01); H10D 30/01 (2025.01); H10D 30/47 (2025.01); H10D 62/824 (2025.01); H10D 62/85 (2025.01);
U.S. Cl.
CPC ...
H10D 64/411 (2025.01); H01L 21/28581 (2013.01); H10D 30/015 (2025.01); H10D 30/475 (2025.01); H10D 62/824 (2025.01); H10D 62/8503 (2025.01);
Abstract

A transistor device includes a semiconductor structure comprising a channel layer and a barrier layer; source and drain contacts on the semiconductor structure; and a gate on the semiconductor structure between the source and drain contacts. A first portion of the barrier layer extending between the source or drain contact and the gate has a first thickness, a second portion of the barrier layer between the gate and the channel layer has a second thickness, and the first thickness is about 1.5 times to 4 times greater than the second thickness. Related methods of fabrication using a looped recess process are also discussed.


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