The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 05, 2025

Filed:

Jul. 27, 2022
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventor:

Jhon-Jhy Liaw, Zhudong Township, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 10/00 (2023.01);
U.S. Cl.
CPC ...
H10B 10/125 (2023.02);
Abstract

A memory structure includes a static random-access memory (SRAM) cell having a cell boundary. The SRAM cell includes a first write-port pull-up (PU) transistor and a second write-port PU transistor, a first write-port pull-down (PD) transistor, a second write-port PD transistor, a first write-port pass-gate (PG) transistor, a second write-port PG transistor, a first read-port PD transistor, a second read-port PD transistor, a first read-port PG transistor, and a second read-port PG transistor respectively including nanostructures that are vertically stacked from each other. The memory structure further includes a write bit-line conductor and a write bit-line-bar conductor in a first metal layer under the SRAM cell, wherein the write bit-line conductor is electrically connected to a source/drain feature of the first write-port pass-gate transistor and the write bit-line-bar conductor is electrically connected to a source/drain feature of the second write-port pass-gate transistor.


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