The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 05, 2025

Filed:

Nov. 13, 2023
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Kyle K. Kirby, Eagle, ID (US);

Kunal R. Parekh, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 21/768 (2006.01); H01L 23/00 (2006.01); H01L 23/52 (2006.01); H01L 29/40 (2006.01);
U.S. Cl.
CPC ...
H01L 23/481 (2013.01); H01L 21/76877 (2013.01); H01L 24/08 (2013.01); H01L 24/80 (2013.01); H01L 2224/08146 (2013.01); H01L 2224/80895 (2013.01); H01L 2224/80896 (2013.01);
Abstract

Systems and methods for a semiconductor device having a front-end-of-line structure are provided. The semiconductor device may include a dielectric material having a backside formed on a front side of a semiconductor substrate material and a front side, and an interconnect structure extending through the dielectric material. The interconnect structure may be electrically connected to a semiconductor memory array proximate the front side of the dielectric material. The semiconductor device may further have an insulating material encasing at least a portion of the semiconductor memory array and an opening created during back-end-of-line processing through which the active contact surface at the backside of the interconnect structure is exposed for electrical connection.


Find Patent Forward Citations

Loading…