The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 29, 2025

Filed:

May. 26, 2024
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Pei-Hsuan Lee, Tainan, TW;

Ching-Hua Hsieh, Hsinchu, TW;

Chien-Ling Hwang, Hsinchu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/36 (2006.01); H01L 21/50 (2006.01); H01L 23/40 (2006.01);
U.S. Cl.
CPC ...
H01L 23/36 (2013.01); H01L 21/50 (2013.01); H01L 23/40 (2013.01);
Abstract

A manufacturing method of a package system includes: providing a base plate with a first thermal interface material (TIM) layer; placing a semiconductor package on the first TIM layer over the base plate, wherein the semiconductor package comprises a plurality of packaging units arranged in an array and a plurality of electrical connectors surrounding the array of the plurality of packaging units; stacking a gasket and a top plate on the array of the plurality of packaging units, wherein the gasket is interposed between the top plate and the array of the plurality of packaging units; and securing the top plate, the gasket, the plurality of packaging units, and the base plate together through a plurality of fasteners, wherein each of the plurality of fasteners is arranged at a gap between two of the adjacent packaging units.


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